One of our global partners that's a lead producer in computer memory and computer data storage is looking for a few Semiconductor Design Engineers to join their team in Boise, ID! They are responsible for designing all the digital and analog circuits used in the development of memory products across their product portfolio. This includes simulating, optimizing, and floor planning for DRAM circuits. This role will fill a critical need on the team to help proactively design next generation products that are optimized for manufacturing and assure the best cost, quality, reliability, time-to-market, and customer satisfaction possible.

This team is rapidly growing and have multiple openings at various experience levels, from recent college graduates up to Principal Engineers. Apply today to connect with a team member on more details! This is a direct hire position and relocation packages are available.

Requirements

2-6+ years of experience designing and developing memory products
Assisting with overall design, layout, and optimization of memory circuits
Experience performing circuit simulations using analog and digital standard industry tools such as SPICE and VERILOG
5 years of experience of custom digital IC
Extensive knowledge of layout design, CMOS Circuit Design, and Device Physics
Experience with Verilog modeling and simulation tools
Experience debugging circuits based on both simulation and silicon results.
Strong understanding of high-speed logic and clock design
Bachelor of Science in Electrical Engineering

Plus Skills

Master of Science in Electrical Engineering

Responsibilities

Lead the creation of circuit solutions with a strong focus on Design for Manufacturability (DFM). Define technical requirements to ensure performance and manufacturability, and proactively address potential issues early in the design process.
Seek out and implement groundbreaking ideas to enhance our solutions. Stay ahead of industry trends and propose innovative approaches that differentiate our offerings from the competition.
Contribute to the design and development of key schematic blocks such as memory arrays, control logic, address decoders, data paths, and internal test logic. Ensure these components are accurate, efficient, and well-integrated.
Understand and assess how architectural decisions affect power consumption, speed, and die size. Optimize designs to balance performance, efficiency, and cost effectively.
Import layout parasitic data into the simulation environment to achieve accurate and realistic results, ensuring that designs perform reliably under actual conditions.

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