Quest Global is hiring for DFT Engineer candidates for our open role in Austin,TX/Palo Alto,CA. Below is the job description. If interested, please share your updated resume.
Job Description:
- Knowledge of DFT techniques and features for digital logic (1149.1, 1149.6, 1687, 1500, Scan, On-chip clock control, Test compression, Logic Built-in-Self-Test, Boundary scan) required
- Experience with Tessent tool flows for DFT RTL insertion and ATPG is required
- Experience in ATPG, coverage analysis, gate simulations & mismatch resolution is required
With Regards
Shashank Verma