Silicon Validation Engineer
We're looking for a Silicon Validation Engineer at an exciting RISC-V start-up!
The Silicon Validation Engineer holds the responsibility for bringing up and validating the SOC subsystems within the SOC design. This role demands an extensive comprehension of cutting-edge SOC design across diverse domains, encompassing physical design, logic, performance, and software. Positions are available in pivotal components of the design, including DDR/HBM, PCIe, CPU, and data accelerator.
Responsibilities:
- Leading an engineering team tasked with devising, executing, and overseeing subsystem silicon bring-up plan to ensure the silicon product meets specified requirements.
- Collaborating closely with cross-functional teams, including design, architecture, firmware, and software, to facilitate seamless subsystem integration and validation.
- Engaging with vendors and partners to facilitate successful subsystem bring-up and validation.
- Identifying and resolving issues encountered during subsystem bring-up and validation, collaborating with cross-functional teams to implement necessary corrective actions.
Requirements:
- Comprehensive understanding of the architecture, microarchitecture, and software interface of the subsystem.
- Hands-on experience in silicon debugging for logic, software, and physical issues.
- Strong aptitude for issue triaging and the development of environments and tools.
- PhD, Master’s Degree, or Bachelor’s Degree with over 5 years of experience in the relevant technical field.
