Formal Design Verification Member of Technical Staff
Acceler8 Talent is seeking a Senior Formal Design Verification Engineer to join an early-stage AI hardware startup. This pioneering company is focused on developing custom chips for Large Language Models (LLMs), aiming to achieve significantly higher efficiency and performance compared to existing market leaders.
Founded by the esteemed engineers who helped develop the industry’s most prominent AI platforms, and have had previous successful exits, this company is exceedingly well funded and is building the task force that will create the future of Generative AI compute.
Required Qualifications & Skills
- Bachelor’s degree + 8 years of industry experience or a Master’s degree + 6 years of experience
- Experience in Formal Verification using JasperGold or Onespin
- Experience with assertion based verification
- Expertise in emulation or simulation based verification
- Expertise with SystemVerilog and similar scripting and programming languages
- Extensive knowledge of UVM components and best practices
- Successful track record driving verification from architecture and design specification to silicon
- Strong understanding of silicon micro-architecture and design concepts used in high-performance compute
This position will be hybrid-remote, with 3 days per week on-site from their Mountain View office.
They are looking to get someone started ASAP and will offer compensation consisting of competitive base salary + stock options.
Please apply here or contact jtyler@acceler8talent.com if you’d like to learn more.
