Role :: RTL design / SoC integration
Location: Dallas, TX, USA (Onsite)
JD:
The candidate will work on a cutting edge ADAS processor SOC development. The candidate will be responsible for integrating complex third party IPs in the SOC. This includes configuration of the IP, developing required logic to integrate the IP into SOC, doing the RTL quality checks as needed/ fixing any Lint / CDC/ RDC issues, fix any defects reported by DV teams, work with Physical Design teams to address issues related to equivalence checks, timing closure, area optimization, etc.
Ask the candidate to fill his expertise level for below interfaces / IPs. We will use it to screen the profiles.
IP / Protocol
Expertise Level:
1 (lowest) to 10 (highest)
Remarks
Gbit Ethernet
PCIe Gen3
USB 3.0
CSI2 TX, CSI2 RX
eDP (embedded display port)
DSI (MIPI Display Serial Interface)
DPI (Display parallel interface
