ASIC Microarchitect - AI Hardware
Acceler8 Talent is seeking an experienced Microarchitect & RTL Designer to join an extremely well funded start-up building processors for Generative AI applications that are substantially more efficient and powerful than anything on the market today.
Founders by highly respected engineers with deep experience on both the hardware and software side of machine learning and with deep networks in the AGI space, this company's goal is to become the compute platform for companies building & running GenAI models.
Requirements
- Concept-to-silicon experience in driving silicon design for subsystems and/or top-level functions with ASICs and SOCs from an architecture specification to production silicon.
- Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for chip design and related flows.
- Production-proven experience in silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), high-speed connectivity, memory management and related functionalities.
- Experience with testing your designs and working closely with verification teams towards performance and coverage closure goals.
- Hands-on experience with design synthesis, equivalence checking, design lint, clock-domain-crossing and related flows to take designs to high quality sign-off.
- Understanding of DFT and physical design concepts and methodologies to achieve high test coverage and best-in-class timing, power and area for designs working with experts in these areas to take designs to sign-off.
- Familiarity with verification, emulation platforms and methodologies is a plus
- Hands-on experience with participation in silicon debug and bring-up is a plus
The position will be hybrid from Mountain View (3 days on-site) or for the right person, remote candidates will also be considered.
Please apply here or contact Luke at ltomaszko@acceler8talent.com to hear more.
