Position: Staff CAD Engineer - IP
Company: Silicon Labs
Location: Austin, TX – hybrid onsite 3 days a week
Salary: $170,000 - $220,000 base salary
(package includes bonus and great benefits)
Duration: Permanent
Work auth: Able to sponsor
Responsibilities:
In charge of the acquisition, integration, characterization, release and support of all 3rd party physical and soft Intellectual Property (IP) used at Silicon Labs
Collaborate closely with the design teams on their design flows and be a bridge between IP vendors and Silicon Labs
Obtain requirements (e.g. characteristics of memory compiler, standard cells, etc. required for a specific project) from design teams and identify appropriate IP suppliers
Engage in evaluation and benchmarking of IPs provided by various suppliers
Plan, analyze, implement and maintain scalable software solutions to manage and verify EDA views from internal and external providers
Characterize timing, noise and power of standard-cells, IO circuits, and memory designs
Prioritize and accomplish the most important objectives of the organization on a committed schedule, both individually and working with others
Perform tool evaluations/benchmarks and report or track bugs in the software to the vendor
Qualifications:
8-12 total years of experience
Experience in physical and soft IP acquisition, installation, and support
Deep understanding of modern digital, analog, mixed signal, power and SOC IC’s development flows and methodologies as well as typical IP needs
Experience with EDA tools such as Virtuoso, Liberate and Crossfire
Proficiency in Python, PERL, Makefile, skill, TCL
Plusses:
Familiarity with IP collaterals such as liberty, LEF, GDS or verilog
Familiarity with Circuit Design (Analog and Digital) concepts and simulation tools
Proven track-record showing support for various design teams
Work with LINT software
Excellent team work, communication and interpersonal skills with both internal teams and external vendors
About the team/role:
The CAD-IP team at Silicon Labs leads the selection, procurement and qualification of 3rd party IPs, also known as vendor IP or external IP, and sets up an IP workflow for managing the IPs, that are incorporated into SoC designs.
