Job Summary:
We are seeking a highly experienced Senior Physical Design Engineer with a strong background in Static Timing Analysis (STA). The ideal candidate will have extensive expertise in tools such as PrimeTime or Tempus. This role involves reviewing timing reports from our backend (BE) partners, providing feedback, and ensuring seamless communication and integration between our team and our partners.
Key Responsibilities:
- Review and analyze timing reports from BE partners using STA tools like PrimeTime or Tempus.
- Provide detailed feedback and recommendations to both internal teams and external partners to optimize design performance.
- Collaborate with cross-functional teams, including design, verification, and implementation teams, to resolve timing issues and ensure design integrity.
- Develop and implement strategies for timing closure, considering various PVT (Process, Voltage, Temperature) corners and OCV (On-Chip Variation) scenarios.
- Work closely with partners to understand and address their design challenges, ensuring alignment with our design specifications and goals.
- Stay updated with the latest advancements in STA methodologies and tools, and integrate best practices into the design process.
- Mentor and guide junior engineers, sharing knowledge and promoting a culture of continuous improvement.
Qualifications:
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- Minimum of 10 years of experience in physical design with a strong focus on STA.
- Proficiency in STA tools such as PrimeTime or Tempus.
- Proven track record of successfully achieving timing closure in complex ASIC/SoC designs.
- Deep understanding of digital design principles, including clock distribution, signal integrity, and power analysis.
- Excellent problem-solving skills and the ability to troubleshoot and resolve complex timing issues.
- Strong communication skills, with the ability to convey technical information effectively to both technical and non-technical stakeholders.
- Experience working in a collaborative environment with external partners or vendors is highly desirable.
Preferred Skills:
- Familiarity with scripting languages (e.g., Perl, Tcl) for automation of STA tasks.
- Experience with advanced process nodes (7nm, 5nm, or below).
- Knowledge of other EDA tools for physical design, such as ICC2 or Innovus.
- Experience with low-power design techniques and methodologies.
