We are seeking a talented Design Verification Engineer to join our team. In this role, you will play a critical part in ensuring the quality and reliability of our integrated IP subsystems by developing comprehensive test benches and executing rigorous verification processes.
Responsibilities:
- Develop and maintain test benches using industry-standard verification methodologies (UVM).
- Create and execute verification test plans to verify functional and performance requirements of IP subsystems.
- Conduct root cause analysis and debug complex verification failures.
- Collaborate with design engineers to improve design quality and testability.
- Utilize scripting languages (Perl, Python) to automate verification tasks and improve efficiency.
- Stay updated with the latest verification methodologies and tools.
Qualifications:
- Bachelor's degree in Electrical Engineering or a related field.
- Minimum of 3-5 years of industry experience in ASIC verification.
- Strong proficiency in Verilog and SystemVerilog.
- In-depth knowledge of UVM verification methodology.
- Excellent problem-solving and debugging skills.
- Strong communication and interpersonal skills.
- Experience with high-speed interface protocols (e.g., PCIe, DDR, Ethernet) is a plus.
Don't Miss This Opportunity!
If you're a passionate and skilled design verification engineer seeking a rewarding career with a company that truly values its employees, this is the role for you. Apply today and join our client's team of innovators shaping the future of technology.
Company Note: Nexus Semiconductor provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, national origin, age, disability, or genetics. In addition to federal law requirements, Nexus Semiconductor Recruitment complies with applicable state and local laws governing nondiscrimination in employment."
