About the Company:
As an Astera Labs Senior Field Applications Engineer, you will support the world’s leading cloud service providers, server, and network OEMs by working with them to design solutions that use Astera Labs’ portfolio of connectivity products. In this role, you will identify and understand customer requirements, propose Astera Labs solutions that provide clear value, and provide hands-on design-in support. You will drive innovation by listening to customer needs, collaborating with our engineering teams to influence the product roadmap, and delivering solutions back to the customer. This role is open to candidates in either the Santa Clara, CA, or Seattle, WA locations.
About the Role:
Basic Qualifications:
- BS in Electrical Engineering; a Master’s degree in Electrical Engineering is preferred.
- Minimum of 5 years’ experience working with Cloud service providers and server OEM customers to design in complex SoC/silicon products for Server, Storage, and/or Networking applications.
- Excellent written and verbal communication skills.
- Strong organization skills with the ability to provide clear and concise notes and actions.
- Customer-oriented, goal-driven, self-motivated, with the ability to work independently and travel frequently to customer sites.
- Entrepreneurial mindset with a can-do attitude; think and act with the customer in mind.
Required Skills:
- Hands-on, thorough knowledge of high-speed protocols like PCIe, CXL, Ethernet, or DDR.
- Deep knowledge and understanding of memory technologies (SRAM, DRAM, SDRAM, DDR, etc.).
- Silicon/System bring-up and debug experience in customer systems.
- Experience with lab equipment, including protocol analyzers, traffic generators, analyzers, and high-speed oscilloscopes.
- Strong background in high-speed board design techniques and understanding of Data Center systems like Servers, JBOGs/JBODs, Networking switches/routers, etc.
- Intermediate level of proficiency in Python for automating system validation and link optimization.
- Able to step through embedded firmware at the SerDes (SoC) or MCU level for debugging.
Preferred Skills:
- Strong working knowledge of high-speed interfaces at a physical layer level, particularly NRZ/PAM4 SerDes-based protocols like PCIe and CXL, with some experience in 12G NRZ, 25G NRZ/56G PAM4 signaling.
- Development, support, and experience with PCIe or CXL memory products.
- Working knowledge of software/firmware build environments, gcc/Make, and GitHub.
- Knowledge of simulation/modeling, schematic capture, and PCB layout tools from Cadence, Altium, etc.
- Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc., for IBIS-AMI analysis.
The base salary range is $130,000.00 USD – $190,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.