Senior ASIC Physical Design Engineer
Are you an experienced ASIC engineer ready to lead the way in generative AI inference acceleration? Join our team and help shape the future of cutting-edge technology. This is a hands-on leadership role where you’ll drive innovation and develop scalable, high-performance systems in a fast-paced, agile environment.
What You’ll Do:
- Lead front-end physical design and workflow development for AI inference acceleration products.
- Optimize and implement advanced workflows, including synthesis, formal checks, power analysis, and STA.
- Collaborate closely with cross-functional teams to enhance productivity and address complex EDA challenges.
- Utilize industry-standard tools like Cadence and Synopsys while exploring new methodologies.
- Support backend teams with clock trees, routing, DRC, LVS, and more.
What We’re Looking For:
- Experience: 10+ years of hands-on ASIC engineering experience, with deep knowledge of VLSI/SoC physical design workflows.
- Skills: Proficiency in STA analysis, SDC writing, and EDA tools (e.g., Cadence/Synopsys).
- Expertise: Strong understanding of clock methodology, power analysis, and design flows.
- Collaboration: Excellent communication and problem-solving skills, with a passion for teamwork in a global, fast-moving environment.
- Education: Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or related fields.
Why Join Us?
- Work on groundbreaking AI technology at the forefront of the industry.
- Collaborate with talented teams in a dynamic, supportive environment.
- Flexible working arrangements and opportunities for growth and innovation.
Ready to take the next step in your career? Let’s build the future together. Apply now!
