System Architect Engineer
Revolutionizing computing with cutting-edge hardware and software, this startup, led by industry titans and backed by $50 million, is redefining the future. At the forefront of distributed systems, they are developing a groundbreaking fabric that doubles IO per dollar, addressing critical bottlenecks in next-gen computing.
They are seeking a System Architect with deep expertise in infrastructure, proficient in both large-scale distributed systems and networking silicon design. This role involves specifying, modeling, and simulating silicon chip and system-level behaviors to innovate the development of a pioneering infrastructure networking product that redefines its category.
Job Description: System Architect Engineer
Responsibilities:
- Develop and maintain simulation methodologies for device performance modeling, including queueing and packet processing models. Integrate functional models into simulations.
- Code models in C/C++, document extensively, and ensure alignment with RTL through equivalence checks.
- Define methodologies and software for model execution, results logging, regression testing, and correlation with functional and RTL DV simulations.
- Lead product architecture definition and validations in areas like network/system/I/O virtualization, security, and system/board management.
- Utilize simulations for customer validation, adapting models as needed for customer and internal goals.
- Specify software and microarchitecture requirements, collaborating for timely product delivery.
- Drive innovations in chip and system-level solutions.
Qualifications:
- Extensive experience in defining and validating processor or networking chip architectures.
- Proficiency in coding silicon/system behavioral models in C, SystemC, or C++; familiarity with ns3 or similar tools preferred.
- Hands-on experience with distributed cluster-scale applications.
- Proven track record in infrastructure product execution.
- Strong programming skills in C/C++; familiarity with scripting (Python, Perl) a plus.
- Understanding of silicon chip architecture and Verilog/SystemVerilog beneficial.
