Job Description
The role is for a position of an experienced SRAM/Register-File/Memory design engineer for CPU.
Roles and Responsibilities include
- Architect, design and verify memory designs for advanced high-performance/low-power processors
- Drive innovation in memory architecture and circuits to improve PPA
- Collaborate with processor design teams to define memory performance/power specifications and enable seamless integration
- Work closely with layout design teams to develop tape-out quality layouts
- Post-layout Performance/Power/robustness verification of memories
- Support post-silicon efforts to enable mass-production
- Mentor junior engineers in the team
Requirement
- Bachelors/Masters/PhD in Electrical Engineering.
- 10+ years’ experience in memory/SRAM/Register-File design
- Memory Design experience in advanced CMOS technology nodes
- Ability to make memory architecture choices based on Performance/Power/Area trade-offs
- Working knowledge of industry standard tools for schematic-layout entry and spice based simulators
- In-depth understanding of memory robustness checks and margins needed for high yield
- Prior experience with behavioral modeling of memories along with functional equivalence checks is preferred
- Prior experience with static timing analysis tools at transistor level is preferred
